/*
 * Copyright (C) 2024 by opencp .inc 
 * yanghuang <virteman@opencp.cn>
 */

#ifndef OPENOCD_LOADERS_FLASH_RM12XX_RM12XX_FLASH_CONFIG_H
#define OPENOCD_LOADERS_FLASH_RM12XX_RM12XX_FLASH_CONFIG_H

#define RM12XX_FLASH_ABORT_TIMEOUT 0xFFFFFF

/* RM12XX chip information */
#define RM12XX_FLASH_WRITE_SIZE 256L   /* One page size for write */
#define RM12XX_FLASH_ERASE_SIZE 4096

/* RM12XX flash loader information */
#define RM12XX_FLASH_LOADER_WORKING_ADDR 0x20004000
#define RM12XX_FLASH_LOADER_PARAMS_ADDR RM12XX_FLASH_LOADER_WORKING_ADDR
#define RM12XX_FLASH_LOADER_PARAMS_SIZE 16
#define RM12XX_FLASH_LOADER_BUFFER_ADDR (RM12XX_FLASH_LOADER_PARAMS_ADDR + RM12XX_FLASH_LOADER_PARAMS_SIZE)
#define RM12XX_FLASH_LOADER_BUFFER_SIZE RM12XX_FLASH_ERASE_SIZE
#define RM12XX_FLASH_LOADER_PROGRAM_ADDR (RM12XX_FLASH_LOADER_BUFFER_ADDR + RM12XX_FLASH_LOADER_BUFFER_SIZE)
#define RM12XX_FLASH_LOADER_PROGRAM_SIZE 0x1000

/* Stack size in byte. 4 byte size alignment */
#define RM12XX_FLASH_LOADER_STACK_SIZE 1024

#define BOOT_FLASH_PROGRAMMED_PATTERN   0xD9EF0045
#define CACHE_BASE_ADR                  0x10000000    //0x10000000
#define CACHE_END_ADR                   0x10000000+0x1000000      //0x01000000  //0x08000000

#define FLASH_CODE_BASE                 0x11001000

#define FLASH_UNCACHED_BASE 			0x11000000  //			0x11000000
#define FLASH_UNCACHED_END  			0x11000000+0x1000000  //			0x24001000


#endif /* OPENOCD_LOADERS_FLASH_RM12XX_RM12XX_FLASH_CONFIG_H */

